经典原版书库计算机组成与体系结构:性能设计(英文版 原书第10版)/(美)威廉.斯托林斯

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经典原版书库计算机组成与体系结构:性能设计(英文版 原书第10版)/(美)威廉.斯托林斯

经典原版书库计算机组成与体系结构:性能设计(英文版 原书第10版)/(美)威廉.斯托林斯

作者:[美]威廉·斯托林斯WilliamSta

开 本:16开

书号ISBN:9787111631460

定价:

出版时间:2018-05-01

出版社:机械工业出版社


16.1 概述576
16.2 设计问题581
16.3  Intel Core微架构591
16.4 ARM Cortex-A8596
16.5 ARM Cortex-M3604
16.6 关键词、复习题和练习题608
第五部分 并行结构
第17章 并行处理613
17.1 多处理器结构615
17.2 对称多处理器617
17.3 高速缓存一致性和MESI协议621
17.4 多线程和片上多处理器628
17.5 集群633
17.6 非均匀内存访问640
17.7 云计算643
17.8 关键词、复习题和练习题650
第18章 多核计算机656
18.1 硬件性能问题657
18.2 软件性能问题660
18.3 多核结构665
18.4 异构多核结构667
18.5 Intel Core i7-990X676
18.6 ARM Cortex-A15 MPCore677
18.7 IBM zEnterprise EC12大型机682
18.8 关键词、复习题和练习题685
第19章 通用图形处理单元688
19.1 CUDA基础689
19.2 GPU与CPU691
19.3 GPU架构概述692
19.4 Intel的Gen8 GPU701
19.5 何时把GPU当作协处理器使用704
19.6 关键词和复习题706
第六部分 控制单元
第20章 控制单元操作707
20.1 微操作708
20.2 处理器的控制714
20.3 硬布线实现724
20.4 关键词、复习题和练习题727
第21章 微程序控制729
21.1 基本概念730
21.2 微指令序列739
21.3 微指令执行745
21.4 TI 8800755
21.5 关键词、复习题和练习题766
附录A 计算机组成与体系结构教学项目768
附录B 汇编语言与相关主题774
参考文献800


Contents

Foreword xiii Preface xv About the Author xxiii
PART ONE INTRODUCTION 1
Chapter.1 Basic Concepts and Computer Evolution 1
1.1 Organization and Architecture 2
1.2 Structure and Function 3
1.3 A Brief History of Computers 11
1.4 The Evolution of the Intel x86 Architecture 27
1.5 Embedded Systems 29
1.6 Arm Architecture 33
1.7 Cloud Computing 39
1.8 Key Terms, Review Questions, and Problems 42
Chapter.2 Performance Issues 45
2.1 Designing for Performance 46
2.2 Multicore, Mics, and GPGPUs 52
2.3 Two Laws that Provide Insight:Ahmdahl’s Law and Little’s Law 53
2.4 Basic Measures of Computer Performance 56
2.5 Calculating the Mean 59
2.6 Benchmarks and Spec 67
2.7 Key Terms, Review Questions, and Problems 74
PART TWO THE COMPUTER SYSTEM 80
Chapter.3 A Top-Level View of Computer Function and Interconnection 80
3.1 Computer Components 81
3.2 Computer Function 83
3.3 Interconnection Structures 99
3.4 Bus Interconnection 100
3.5 Point-to-Point Interconnect 102
3.6 PCI Express 107
3.7 Key Terms, Review Questions, and Problems 116
Chapter.4 Cache Memory 120
4.1 Computer Memory System Overview 121
4.2 Cache Memory Principles 128
4.3 Elements of Cache Design 131
4.4 Pentium 4 Cache Organization 149
4.5 Key Terms, Review Questions, and Problems 152
Appendix 4A Performance Characteristics of Two-Level Memories 157
Chapter.5 Internal Memory 165
5.1 Semiconductor Main Memory 166
5.2 Error Correction 174
5.3 DDR DRAM 180
5.4 Flash Memory 185
5.5 Newer Nonvolatile Solid-State Memory Technologies 187
5.6 Key Terms, Review Questions, and Problems 190
Chapter.6 External Memory 194
6.1 Magnetic Disk 195
6.2 RAID 204
6.3 Solid State Drives 212
6.4 Optical Memory 217
6.5 Magnetic Tape 222
6.6 Key Terms, Review Questions, and Problems 224
Chapter.7 Input/Output 228
7.1 External Devices 230
7.2 I/O Modules 232
7.3 Programmed I/O 235
7.4 Interrupt-Driven I/O 239
7.5 Direct Memory Access 248
7.6 Direct Cache Access 254
7.7 I/O Channels and Processors 261
7.8 External Interconnection Standards 263
7.9 IBM zEnterprise EC12 I/O Structure 266
7.10 Key Terms, Review Questions, and Problems 270
Chapter.8 Operating System Support 275
8.1 Operating System Overview 276
8.2 Scheduling 287
8.3 Memory Management 293
8.4 Intel x86 Memory Management 304
8.5 Arm Memory Management 309
8.6 Key Terms, Review Questions, and Problems 314
PART THREE ARITHMETIC AND LOGIC 318
Chapter.9 Number Systems 318
9.1 The Decimal System 319
9.2 Positional Number Systems 320
9.3 The Binary System 321
9.4 Converting Between Binary and Decimal 321
9.5 Hexadecimal Notation 324
9.6 Key Terms and Problems 326
Chapter.10 Computer Arithmetic 328
10.1 The Arithmetic and Logic Unit.329
10.2 Integer Representation 330
10.3 Integer Arithmetic 335
10.4 Floating-Point Representation 350
10.5 Floating-Point Arithmetic 358
10.6 Key Terms, Review Questions, and Problems 367
Chapter.11 Digital Logic 372
11.1 Boolean Algebra 373
11.2 Gates 376
11.3 Combinational Circuits 378
11.4 Sequential Circuits 396
11.5 Programmable Logic Devices 405
11.6 Key Terms and Problems 409
PART FOUR THE CENTRAL PROCESSING UNIT.412

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